1. Technical Field
The present invention relates to a semiconductor apparatus, and more particularly, to a magnetic random access memory apparatus and methods for programming and verifying reference cells therefor.
2. Related Art
A DRAM (dynamic random access memory) has advantages in that an operation speed is high and power consumption is low and a disadvantage in that it is volatile. A flash memory has a nonvolatile characteristic in that it does not lose stored information even when power is off. The flash memory has advantages in that miniaturization is possible compared to a general hard disc, it is invulnerable to a physical impact and an access speed is high. On the contrary, the flash memory has disadvantages in that an operation speed is lower and an operation voltage is higher than the DRAM.
Recently, various memory apparatuses with advantages of the DRAM and the flash memory have been developed, and a representative example thereof is a magnetic random access memory (MRAM). The MRAM uses a change in resistance according to a change in the polarity of a magnetic substance, as a digital signal, and has an advantage in that safety becomes excellent because magnetism is used.
In general, an MRAM has bit lines, word lines and digit lines which are parallel to the word lines, and records data using a vector sum of magnetic fields which are induced when current flows simultaneously through the bit lines and the digit lines. In the MRAM, a limitation exists in decreasing the size of a cell because the digit lines are additionally needed. Also, when recording data by selecting a cell, unselected cells are likely to be exposed to magnetic fields. Due to this fact, a problem is caused in that the data storage states of the unselected cells may be inverted.
In order to solve these problems of the MRAM, a spin transfer torque magnetic random access memory (STT-MRAM) has been developed.
The STT-MRAM uses a phenomenon that, when high density current with an aligned spin direction is incident on a ferromagnetic substance, the magnetization direction of the ferromagnetic substance is aligned with the spin direction of current when the magnetization direction of the ferromagnetic substance does not correspond to the spin direction of current, that is, an STT (spin transfer torque) phenomenon. The STT-MRAM includes one selection transistor which is connected between a bit line and a source line and a magnetic tunnel junction (MTJ).
FIG. 1 is a view illustrating an exemplary MTJ which is applied to an STT-MRAM generally known in the art.
Referring to FIG. 1, a magnetic tunnel junction 1 includes a first electrode layer as a top electrode, a second electrode layer as a bottom electrode, a first magnetic layer and a second magnetic layer as a pair of magnetic layers, and a tunneling barrier layer which is formed between the pair of magnetic layers.
The first magnetic layer may be a free ferromagnetic layer in which a magnetization direction is changed depending upon the direction of current applied to the MTJ, and the second magnetic layer may be a pinned ferromagnetic layer of which magnetization direction is pinned.
The resistance value of the MTJ is changed depending upon the direction of current, by which “0” or “1” is recorded.
FIGS. 2a and 2b are views explaining a data recording principle for the MTJ.
First, FIG. 2a is a diagram for explaining a principle for recording data of a logic low level (0) in the MTJ. When it is necessary to record the data, a corresponding word line WL is enabled, and a selection transistor ST is turned on. Then, as current flows in a direction extending from a bit line BL to a source line SL, that is, as current flows from the first electrode layer as the top electrode of the MTJ to the second electrode layer as the bottom electrode of the MTJ (as indicated by the dotted arrow), the magnetization direction of the first magnetic layer as the free ferromagnetic layer and the magnetization direction of the second magnetic layer as the pinned ferromagnetic layer become parallel to each other. As a result, a low resistant state is created, and the data at this time may be defined as having a logic low level (0).
Meanwhile, FIG. 2b is a diagram for explaining a principle for recording data of a logic high level (1) in the MTJ. Similarly, the corresponding word line WL is enabled, and the selection transistor ST is turned on. Then, as current flows in a direction extending from the source line SL to the bit line BL, that is, as current flows from the second electrode layer to the first electrode layer (as indicated by the dotted arrow), the magnetization direction of the first magnetic layer and the magnetization direction of the second magnetic layer become anti-parallel to each other. As a result, the MTJ has a high resistant state, and the data at this time may be defined as having a logic high level (1).
In general, in the STT-MRAM, a reference cell is used to read the data stored in a memory cell. That is to say, by using a difference between an amount of current flowing through the memory cell to be read and an amount of current flowing through the reference cell, it is determined whether the data stored in the memory cell is in a logic low state or a logic high state.
Accordingly, precise data to serve as a reference for data reading should be recorded in the reference cell. Also, in order to determine whether the data stored in the memory cell is in a logic low state or a logic high state, a logic low state and a logic high state should be recorded in the reference cell as well.
To record precise data serving as the reference for data reading in the reference cell is regarded as an important factor which determines the operational reliability of the STT-MRAM. Therefore, reliable techniques for recording data in a reference cell and verifying recorded data are demanded in the art.